ADVISORY: Accellera's Chairman, Dennis Brophy, and Accellera Technical Committee Members Present at Virtual DACafé
Who:
Accellera, the EDA organization focused on language-based design standards, based in Napa, California USA, invites the worldwide electronic design community to hear a keynote and review presentations about the organization's standards efforts and technical committee work at www.virtualdacafe.com.
What:
Accellera’s online and on-demand presentations at Virtual DACafé, the world’s first virtual electronic design automation tradeshow include:
Keynote:
Language Standards and Design Tool Interoperability--Where Are We Headed?, Dennis Brophy, Accellera’s Chairman
Technical Committee Presentations:
- ALF- A New Standard Library Description for UDSM Design Flow, Wolfgang Roethig, NEC
- Improving Verification Through Property Specification, Harry Foster, Verplex
- Overview of Verilog AMS Extensions, Jonathan Sanders, Cadence Design
- System Verilog Assertions, David Lacey, Hewlett-Packard and Tom Fitzpatrick, Co-Design Automation
- Interface Standards for System Design, Brian Bailey, Mentor Graphics
- Semantics for System-Level Computational Models, Roberto Passerone, Cadence Design
- Verilog: The Next Generation SystemVerilog 3.0, Stuart Sutherland, Sutherland HDL Inc.
- The System-Level Language- Rossetta, Perry Alexander, University of Kansas
When:
Accellera presentations are accessible 24/7 through midnight June 7, 2002
Where:
To attend Virtual DACafé, please visit www.virtualdacafe.com.
The Accellera Technical Committee member presentations are offered in the Accellera booth at Virtual DACafé, virtual booth #1.The Accellera keynote takes place in the Virtual DACafé Auditorium
About Accellera:
Accellera is an electronics industry organization that drives the worldwide development and use of standards required by systems, semiconductor and design tool companies that enhance a language-based design automation process. This includes support of technical groups involved with development of standards for the IEEE 1364 Verilog HDL standard and the IEEE 1076 VHDL standard. For more information, please visit www.accellera.org.
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Press Contact: Georgia Marszalek, ValleyPR for Accellera, 650-345-7477, Georgia@ValleyPR.com
Acronyms:
ALF - Advanced Library Format
AMS - Analog/Mixed Signal
EDA - Electronic Design Automation
HDL - Hardware Description Language
IEEE - Institute of Electrical and Electronic Engineers
IEEE 1076 - IEEE VHDL standard
IEEE 1364 - IEEE Verilog HDL standard
UDSM - Ultra-Deep SubMicron
VHDL - VHSIC (Very High-Speed IC) HDL
The information supplied by Accellera is believed to be accurate and reliable, and Accellera assumes no responsibility for any errors that may appear in this document.
All trademarks and registered trademarks are the property of their respective owners.
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